Kneechord Convergence Strategy

This improves the stability of gnucap nonlinear modeling. This report Convergence of Saturated Magnetic Models in Gnucap Circuit Simulator (PS.GZ format) explains a bit more about nonlinear modeling and convergence, along with examples. Same report in PDF format

This patch: Kneechord patch against gnucap v0.31 provides the option to use the Kneechord strategy which improves numerical stability in nonlinear components (particularly saturated inductors). NB: This patch ONLY installs the function call into the inductor model. It is a simple additional change to install this into other models.

This patch: Phi patch against gnucap v0.31 provides additional probes for inductors: PHI() and FLUX() which both do the same thing and return the flux-linkage of the coil.

WARNING: The above patches are mostly for historical interest, gnucap v0.34 already includes the PHI and FLUX probes as standard and includes the kneechord strategy as an experimental feature on all two terminal devices (you need to edit the Makefile -- add inverse.cc to the list of source files, add inverse.o to the list of object files and add -DKNEECHORD to the CFLAGS). Hopefully the kneechord will become standard in a future release, you can still switch it off using the new "STRAGEGY" option. It is probably confusing having a "METHOD" option and a "STRATEGY" option which sound vaguely related but really are quite different, people will just have to get used to it.

Gnucap GENERATOR Command Taking Input From ASCII File

Here's a patch that allows you to specify a file for input with the GENERATOR command. One possible use for this is to make gnucap model audio filters. Using sox you can convert your audio sample into *.dat format (i.e. plain ASCII text) and pump that into gnucap as an input signal for transient analysis. The output of the TRAN command can be redirected to another ASCII file which can be fed back into sox for playback (annoyingly, sox is highly fussy about the header line on the text file and the gnucap output header line in unacceptable to sox... you need to edit in your own header line). Note that gnucap is not a fast way of implementing an audio filter but it does let you model real analog hardware and get some idea of what your circuit sounds like before you commit to building.

Eagle CAD and gnucap

I've been using the "Light" version of Eagle CAD which is excellent value and runs on Linux, MS-Windows and Mac platforms. It's small, fast, reasonably stable (only got it to crash once) and doesn't take too long to learn. It is designed primarily for circuit board design but the schematic editor can be handy for putting together simulation models. Knocking out a schematic on Eagle CAD is much faster than writing a SPICE netlist and you get printable documentation for reports (Eagle will output to postscript and EPS).

Eagle gives you an interpreted programming language that is a bit like Java, with "String" as a native type and the ability to access all the CAD system data structures in an object oriented manner. It's quite a handy thing to have because you can easily export CAD data in whatever format you like and you can extend the basic editor with your own funky commands.

Naturally, I want to output to gnucap. I would have written the entire thing in the Eagle CAD language but when it comes to the wire, perl is much more powerful. Most significantly, perl has hash tables as a native type and while I could write a hash table for Eagle CAD, it didn't seem worth the effort. Thus I have a two-phase process. A very simple program runs in Eagle CAD and outputs the circuit topology (Eagle's internal topology is net-oriented so this first phase is net-oriented) then a more complex perl program runs as the second phase and converts this into a SPICE netlist (which is device-oriented).

You still need to define any subcircuit models for the chips that you use but that isn't too difficult because gnucap allows ".<" lines that will allow a top-level simulation file to bring in subcircuit models from one group of files and the main netlist from another file and then declare simulation commands. This all works quite nicely, the one thing that does need tweaking is the mapping between CAD device pins and model device pins. I've put that mapping into a special function in the perl program, eventually it should be modularised but by writing the mapping in perl (rather than a data file) you have both high speed and great flexibility.

topology_2004-12-22.ulp Eagle CAD interpreted program to dump the schematic contents into a topology file (which lists device pins grouped by their net number). This is such a simple dump that the program will be unlikely to ever change.
top2net_2004-12-22.pl Perl program to convert topology listings into SPICE netlists. You need to edit this to construct your own mapping, especially for integrated circuits which all have arbitrary pin-outs. The mapping for simple resistors, capacitors, etc is very simple and probably will not need to change.

Vapourware

Other patches still to come: patch for improved error message when the node does not converge (give actual node number rather than internal node number which is useless to the user).

The non-convergence in gnucap is a constant source of annoyance especially when it gives so little explanation as to why or what has gone wrong.

Kneechord Convergence Strategy

Gnucap GENERATOR Command Taking Input From ASCII File

Eagle CAD and gnucap

Vapourware

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